General Description
IRQ — Interrupt Request Pin Sensitivity Bit
IRQ is set only by reset, but can be cleared by software. This bit can
be written only once.
1 = IRQ pin is both negative edge- and level-sensitive.
0 = IRQ pin is negative edge-sensitive only.
Bits 7–4 and 0 — Not used; always read 0
Bit 2 — Unaffected by reset; reads either 1 or 0
1.5 Block Diagram
Figure 1-2 shows the structure of the MC68HC705C4A.
1.6 Pin Assignments
The MC68HC705C4A is available in four packages:
• 40-pin plastic dual in-line package (PDIP)
• 44-lead plastic-leaded chip carrier (PLCC)
• 44-pin quad flat pack (QFP)
• 42-pin shrink dual in-line package (SDIP)
The pin assignments for these packages are shown in Figure 1-3,
Figure 1-4, Figure 1-5, and Figure 1-6.
Technical Data
24
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
General Description
MOTOROLA