MC9S08QG8MPBE View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MC9S08QG8MPBE' PDF : 314 Pages View PDF
Table 1-2 provides the functional versions of the on-chip modules.
Table 1-2. Versions of On-Chip Modules
Module
Analog Comparator
Analog-to-Digital Converter
Central Processing Unit
IIC Module
Internal Clock Source
Keyboard Interrupt
Modulo Timer
Serial Communications Interface
Serial Peripheral Interface
Timer Pulse-Width Modulator
Low-Power Oscillator
Debug Module
(ACMP)
(ADC)
(CPU)
(IIC)
(ICS)
(KBI)
(MTIM)
(SCI)
(SPI)
(TPM)
(XOSC)
(DBG)
Version
2
1
2
1
1
2
1
3
3
2
1
2
Chapter 1 Device Overview
System Clock Distribution
Figure 1-2 shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function. All memory mapped registers associated with the modules are clocked with BUSCLK.
EXTAL XTAL
TCLK
XOSC
SYSTEM
CONTROL
LOGIC
TPM
MTIM
IIC
SCI
SPI
ICSFFE
ICSFFCLK ÷2
FIXED FREQ CLOCK (XCLK)
ICS
ICSOUT
÷2
BUSCLK
ICSLCLK**
1-kHz
COP
ICSERCLK*
BDC
RTI
* ICSERCLK requires XOSC module.
** ICSLCLK is the alternate BDC clock source for the MC9S08QG8/4.
CPU
ADC
FLASH
ADC has min and max
frequency requirements.
See the ADC chapter
and
Appendix A, “Electrical
Characteristics.”
FLASH has frequency
requirements for
program
and erase operation.
See Appendix A,
“Electrical
Characteristics.”
Figure 1-2. System Clock Distribution Diagram
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor
21
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