MC9S12DT256 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MC9S12DT256

MC9S12DT256 Device User Guide V03.07

Freescale Semiconductor 

Prev 51 52 53 54 55 56 57 58 59 60 Next

MC9S12DT256 Device User Guide — V03.07

Pin Name

Funct. 1

EXTAL

XTAL

Pin Name

Funct. 2

—

—

Pin Name Pin Name Pin Name Power

Funct. 3 Funct. 4 Funct. 5 Supply

—

—

—

VDDPLL

—

—

—

VDDPLL

Internal Pull

Resistor

CTRL

Reset

State

NA

NA

NA

NA

Description

Oscillator Pins

RESET

—

—

—

—

VDDR None

None External Reset

TEST

—

—

—

—

N.A.

NA

NA Test Input

VREGEN

—

—

—

—

VDDX NA

NA Voltage Regulator Enable Input

XFC

—

—

—

—

VDDPLL NA

NA PLL Loop Filter

BKGD

TAGHI

MODC

—

Always

Background Debug, Tag High, Mode

—

VDDR

Up

Up

Input

PAD[15]

AN1[7]

ETRIG1

—

Port AD Input, Analog Input AN7

—

VDDA None

None of ATD1, External Trigger Input of

ATD1

Port AD Inputs, Analog Inputs

PAD[14:8] AN1[6:0]

—

—

—

VDDA None

None AN[6:0] of ATD1

PAD[7]

AN0[7]

ETRIG0

—

Port AD Input, Analog Input AN7 of

—

VDDA None

None ATD0, External Trigger Input of ATD0

Port AD Inputs, Analog Inputs

PAD[6:0] AN0[6:0]

—

—

—

VDDA None

None AN[6:0] of ATD0

PA[7:0]

ADDR[15:8]/

DATA[15:8]

—

—

—

VDDR PUCR Disabled Port A I/O, Multiplexed Address/Data

PB[7:0]

ADDR[7:0]/

DATA[7:0]

—

—

—

VDDR PUCR Disabled Port B I/O, Multiplexed Address/Data

PE7

NOACC

XCLKS

—

—

VDDR PUCR

Up Port E I/O, Access, Clock Select

PE6

IPIPE1

MODB

—

While RESET

—

VDDR

pin is low:

Port E I/O, Pipe Status, Mode Input

Down

PE5

IPIPE0

MODA

—

While RESET

—

VDDR

pin is low:

Port E I/O, Pipe Status, Mode Input

Down

PE4

ECLK

—

—

—

VDDR PUCR

Up Port E I/O, Bus Clock Output

PE3

LSTRB

TAGLO

—

—

VDDR PUCR

Up Port E I/O, Byte Strobe, Tag Low

PE2

R/W

—

—

—

VDDR PUCR

Up Port E I/O, R/W in expanded modes

PE1

IRQ

—

—

—

VDDR PUCR

Up Port E Input, Maskable Interrupt

PE0

XIRQ

—

—

—

VDDR PUCR

Up Port E Input, Non Maskable Interrupt

PH7

KWH7

SS2

—

PERH/

—

VDDR PPSH Disabled Port H I/O, Interrupt, SS of SPI2

PH6

KWH6

SCK2

—

PERH/

—

VDDR PPSH Disabled Port H I/O, Interrupt, SCK of SPI2

PH5

KWH5

MOSI2

—

PERH/

—

VDDR PPSH Disabled Port H I/O, Interrupt, MOSI of SPI2

54

Share Link: