MC9S12DT512 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MC9S12DT512' PDF : 124 Pages View PDF
Section 3 System Clock Description
MC9S12DP512 Device Guide V01.25
3.1 Overview
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1 shows the clock connections from the CRG to all modules.
Consult the CRG Block Guide and OSC Block Guide for details on clock generation.
Core Clock
EXTAL
OSC
XTAL
CRG
Bus Clock
Oscillator Clock
HCS12 CORE
MEBI CPU
INT
MMC
BDM BKP
Flash
RAM
EEPROM
ECT
ATD0, 1
PWM
SCI0, SCI1
SPI0, 1, 2
CAN0, 1, 2, 3, 4
IIC
BDLC
PIM
Figure 3-1 Clock Connections
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