ML2264
A0, A1
ADDR
VALID
tAH
tAS
RD
A0, A1
ADDR
VALID
tAH
tAS
WR
a) RD Mode (Pin 5 = GND)
b) WR-RD Mode (Pin 5 = VCC)
Figure 1. Analog Multiplexer Address Timing for Track & Hold Mode (Pin 23 = GND)
CS
tAS
tAH
A0, A1
ADDR
VALID
Figure 2. Analog Multiplexer Address Timing for Sample & Hold Mode (Pin 23 = VCC)
DATA
OUTPUT
10pF
5k
OUTPUT VCC
ENABLE
GND
OUTPUT
VOH
GND
tf
50% 90%
10%
t1H
VOH – 100mV
VCC
5k
DATA
OUTPUT
10pF
OUTPUT VCC
ENABLE
GND
OUTPUT
VCC
VOL
tf
50% 90%
10%
t0H
VOL + 100mV
Figure 3. High Impedance Test Circuits and Waveforms
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