ML2712CH View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
MFG CO.
'ML2712CH' PDF : 22 Pages View PDF
PRELIMINARY
ML2712
CONTROL INTERFACES (CONTINUED)
Control Bits LD1 & LD2
The PLLs indicate their lock status using the Lock
Detect output (LD Pin 3). Control bits LD1 & LD2
program the indication of frequency lock on 1LO, 2LO, or
both 1LO and 2LO, as shown in Table 6.
Control Bit PB
A band-gap voltage reference is used to control bias
levels. Control Bit PB in CONTROL WORD A controls
this internal voltage reference. For any circuits to
operate, other than the control interfaces, this bit
must equal 1.
Control Mode
LD1
0
0
0
1
locked
1
1
1
1
LD2
0
1
1
unlocked
locked
0
0
0
0
1
1
1
1
1
1
1
1
LO Status
1LO
x
unlocked
locked
locked
2LO
x
unlocked
unlocked
0
LD Pin output
1
0
0
1
Mode of Operation
Output disabled
1LO lock indication
unlocked
locked
unlocked
locked
unlocked
locked
unlocked
locked
unlocked
unlocked
locked
locked
unlocked
unlocked
locked
locked
0
0
2LO lock indication
1
1
0
0
2LO & 1LO lock
indication
0
1
Table 6. Lock Detect Mode
Control Bits PP1, PP2 & PPW
In each PLL a charge pump or switched current
source either sinks or sources a current pulse
depending on the error signal at the phase detector.
Iif the divided VCO frequency at the phase detector
is greater than the reference frequency, the charge
pump will source a current pulse. The current pulse
is fed to an external loop filter serving as an
integrator or current reservoir. The result is the
voltage across the loop filter and the tuning voltage
to the VCO increasing or decreasing depending on
the loop filter being referenced to ground or the
power supply. The polarity of charge pumps within
the PLL and transmit wideband PLL (WBPLL) may be
programmed using CONTROL WORD A as shown in
Table 7. The charge pump current settings in Table 10
assume that the external loop filter is reference to ground.
CONTROL WORD B
Control Word B changes the control mode in which
ML2712 operates. CONTROL WORD B may also be
used to program charge pump current level and
enable the DAC, Comparator & calibration circuits.
Control Bits TX, RX & LBC
The Mode of operation can be controlled via the serial
interface (which disables the parallel operating mode
interface). This option reduces the pin count requirement
for a baseband controller. Individual circuit blocks may
all be toggled on or off using control words. Extra control
mode bits, TX & RX in CONTROL WORD B, are provided
to enable transmit and receive switching via the Serial
Control Bus interface. These control bits are enabled by
the LBC control bit as shown in Table 8. Individual circuit
blocks may be controlled by the Serial Control Bus control
interface during LBC = 1 mode. When LBC = 1 the
control lines TS (pin 47) and RS (pin 48), are ignored and
the Mode of operation is determined by the TX and RX bit
in Control Word D.
Control Bit in
CONTROL WORD B
TX
RX
LBC
Control Status
X
X
0
Parallel Control Interface
(Default Power on condition)
0
0
1 Serial control - Tx & Rx circuits off
0
1
1 Serial control - Rx circuits on
1
0
1 Serial control - Tx circuits on
1
1
1 Serial control - Tx & Rx circuits off
Table 8. Parallel Control Over-Ride Using LBC Bit
Control Bit in CONTROL
WORD A
ML2712 Charge Pump Polarity
PP1 PP2 PPW 1LO Charge pump polarity 2LO Charge pump polarity WBPLL Charge pump polarity
1
x
x
Frequency signal > Frequency
ref. Pump high
x
x
0
x
x
Frequency signal > Frequency
ref. Pump low
x
x
x
1
x
x
Frequency signal > Frequency
ref. Pump high
x
x
0
x
x
Frequency signal > Frequency
ref. Pump low
x
x
x
1
x
x
Frequency signal > Frequency ref.
Pump high
x
x
0
x
x
Frequency signal > Frequency ref.
Pump low
Table 7. Charge Pump Polarity
January, 2000 PRELIMINARY DATASHEET
15
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