ML6692CH View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
MFG CO.
'ML6692CH' PDF : 21 Pages View PDF
ML6692
INITIALIZATION INTERFACE
The ML6692 has an Initialization Interface to allow
register programming that is not supported by the MII
Management Interface. The intitialization data is loaded
at power-up and cannot be changed afterwards. The pin
EDIN selects one of three possible programming modes.
The Initialization Register bit assignment is shown in
Table 1.
EEPROM PROGRAMMING
With EDIN floating (set to a high impedance), the
ML6692 reads the 16 configuration bits from an external
serial EEPROM (93LC46 or similar) using the industry-
standard 3-wire serial I/O protocol. After power up, the
ML6692 automatically generates the address at EDIN and
the clock at ECLK to read out the 16 configuration bits.
The EEPROM generates the configuration bit stream at
EDOUT, synchronized with ECLK. Interface timing is
shown in Figure 6. It is important to note that the ML6692
expects LSBs first, whereas the 93LC46 shifts MSBs out
first. Therefore, the data pattern must be reversed before
programming it into the EEPROM.
MICROCONTROLLER PROGRAMMING
With EDIN high, the ML6692 expects the 16
configuration bits transfered directly at EDOUT,
synchronized with the first 16 clock rising edges provided
externally at ECLK after power-up. This mode is useful
with a small microcontroller; one controller can program
several ML6692 parts by selectively toggling their ECLK
pins. Interface timing is shown in Figure 7.
ML6692 HARD-WIRED DEFAULT
With EDIN low, the SEL10HD, SEL10FD, and SEL100T4
pins set their corresponding bits in the management status
register, and the ML6692 responds to MII PHYAD 00000
only.
EDIN
Floating
(EEPROM ADDR)
High
Low
MODE
EEPROM
Microcontroller
Hardwired
FUNCTION OF RELATED PINS
SEL10FD/ECLK
SEL100T4/EDOUT
SEL10HD
ECLK (Output Clock EDOUT (Input Data
to EEPROM)
from EEPROM)
No Affect
ECLK (Input Clock EDOUT (Input Data
from Microcontroller) from Microcontroller)
No Affect
SEL10FD
SEL100T4
(Initialization bit 9) (Initialization bit 8)
SEL10HD
(Initialization bit 10)
14
tPW1
tPW2
tPER1
ECLK
(DRIVEN BY 01 02 03 04 05 06 07 08 09 10 11 12 13
26
ML6692)
EDIN
(DRIVEN BY SB OP1 OP0 A5 A4 A3 A2 A1 A0
ML6692) 1
1
0
0
0
0
0
0
0
EDOUT
(DRIVEN BY
EEPROM)
D0
Figure 6. EEPROM Interface Timing
D1 D2 D3 D14 D15
tDV1
16 BITS DATA ADDRESS
ECLK
(INPUT TO
ML6692)
EDOUT
(INPUT TO
ML6692)
tPW3
01 02
tH1
tS1
tPER2
16
tPW4
Figure 7. Microcontroller Mode Interface Timing
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