ML6697 View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
MFG CO.
'ML6697' PDF : 16 Pages View PDF
ML6697
MII MANAGEMENT INTERFACE REGISTERS
TABLE 1: CONTROL REGISTER
BIT(s)
0.15
Reset
NAME
0.14 Loopback
0.13 Manual Speed Select
0.11 Power down
0.12, Not Used
0.10-0.0
DESCRIPTION
1 = reset all register bits to defaults
0 = normal operation
1 = PMD loopback mode
0 = normal operation
1 = 100Mb/s
0 = 10Mb/s
1 = power down
0 = normal operation
TABLE 2: STATUS REGISTER
BIT(s)
1.14
NAME
100BASE-TX full duplex
1.13 100BASE-TX half duplex
1.2
Link status
1.0
Extended capability
1.15,
1.12-1.3,
1.1
Not used
DESCRIPTION
1 = full duplex 100BASE-TX capability
0 = No full duplex 100BASE-TX capability
1 = half duplex 100BASE-TX capability
0 = no half duplex 100BASE-TX capability
1 = 100BASE-TX line is up
0 = 100BASE-TX link is down
1 = extended register capabilities
0 = basic register set only
NOTE: All unnamed or unused register locations will return a 0 value when accessed.
KEY: LL = latch low until read, R/W = read/write, RO = read only, SC = self-clearing.
R/W
R/W, SC
R/W
RO
R/W
RO
DEFAULT
0
0
1
0
0
R/W
RO
RO
RO/LL
RO
RO
DEFAULT
0
1
latch low after
link fail until read
0
0
12
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