ML9042-XX View Datasheet(PDF) - LAPIS Semiconductor Co., Ltd.
Part Name
Description
MFG CO.
'ML9042-XX' PDF : 58 Pages View PDF
LAPIS Semiconductor
FEDL9042-01
ML9042-xx
I/D = “1” (Increment)
I/D = “0” (Decrement)
DD RAM: Display data RAM
The
S = “1” (Shifts the display.)
S/C = “1” (Shifts display.)
R/L = “1” (Right shift)
S/C = “0”
R/L = “0”
(Moves the
(Left shift)
cursor.)
CG RAM:
ABRAM:
Character generator
Arbitrator data RAM
RAM
D/L = “1” (8-bit data)
DL = “0” (4-bit data)
ACG: CGRAM address
execution
time is
dependent
upon
N = “1” (2 lines)
N = “0” (1 line)
ADD: DDRAM address
frequen-
ABE = “1” (Arbitrator displayed)
(Corresponds to the cursor cies.
ABE = “0” (Arbitrator not displayed)
address)
SSR = “1” (Transfer direction: SEG100 SEG1)
AAB: ABRAM address
—
SSR = “0” (Transfer direction: SEG1 SEG100)
CSR = “1” (Transfer direction: COMn COM1)
CSR = “0” (Transfer direction: COM1 COMn)
BF = “1” (Busy)
BF = “0” (Ready to accept
ADC:
Address counter (Used by
DDRAM, ABRAM and
CGRAM)
an instruction)
B = “1” (Enables blinking)
C = “1” (Displays the cursor.)
D = “1” (Displays a character pattern.)
AS = “1” (Arbitrator Displays AS = “0” (Arbitrator Displays
arbitrator on the
arbitrator on the
upper line)
lower line)
: Don't Care
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