LAPIS Semiconductor
FEDL9092-01
ML9092-01/02/03/04
Instruction Code List (ML9092-01)
No.
Instruction
0 Key scan register read
Instruction Code
Fixed bit R/W
Register No.
Data
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4
1 1 1 0 0 0 0 0 ST2 ST1 ST0 S4
Description
D3 D2 D1 D0
Reads scan read timing bits (ST0 to ST2) and key scan
S3 S2 S1 S0 data (S0 to S4) of the key scan register.
1 Display data RAM write
1 Display data RAM read
2 X address register set
3 Y address register set
4 Port register A set
5 Port register B set
6 Port register C set
7
Port register D set
8 Control register 1 set
1
100
0
0
0
1
D7
D6
D5
D4
D3
D2
D1
D0
Writes display data (D0 to D7) in the display data RAM
after setting the X address of Y address.
1
110
0
0
0
1
D7
D6
D5
D4
D3
D2
D1
D0
Reads display data (D0 to D7) from the display data RAM
after setting the X address of Y address.
11000 0 1 0 –
–
–
– X3 X2 X1 X0 Sets the X address (X0 to X3) of the display data RAM.
11000 0 1 1 –
–
–
– Y3 Y2 Y1 Y0 Sets the Y address (Y0 to Y3) of the display data RAM.
11000 1 0 0 –
–
–
–
–
–
– PTA0 Controls the output of the general-purpose port A (PTA0).
11000 1 0 1 –
–
–
–
–
PTB2
PTB1
PTB0
Controls the output of the general-purpose port B (PTB0
to PTB2).
11000 1 1 0 –
–
–
PTC4
PTC3
PTC2
PTC1
PTC0
Controls the
to PTC4).
output
of
the
general-purpose
port
C
(PTC0
11000 1 1 1 –
–
–
PTD4
PTD3
PTD2
PTD1
PTD0
Controls the output of the general-purpose port D (PTD0
to PTD4).
Sets the address increment X or Y direction (INC), display
11001
0
0
0 INC WLS KT SHL BE
PE
DTY1
DTY0
data word length (WLS), key scan time (KT), common
driver shift direction (SHL), voltage doubler control (BE),
port control (PE), and display duty (DTY0, DTY1).
9 Control register 2 set
A Rotary encoder read
B Contrast ADJ set
C
PWM0 register set
D
PWM1 register set
E
PWM2 register set
11001 0 0 1 0
0
0
0
0
0
0 DISP Sets display ON/OFF (DISP).
1 1 1 0 1 0 1 0 Q4 Q4 Q4 Q4 Q4 Q3 Q2 Q1 Reads the counter bits (Q1 to Q4) of the rotary encoder.
Sets contrast adjustment values with the contrast
11001 0 1 1 –
–
–
– CT3 CT2 CT1 CT0 adjustment bits (CT0 to CT3).
11001
1
0
0
PW07
PW06
PW05
PW04
PW03
PW02
PW01
PW00
Sets the pulse width to be
port B (PTB0) with the bits
output from general-purpose
(PW00 to PW07) of PWM0.
Sets the pulse width to be output from general-purpose
1 1 0 0 1 1 0 1 PW17 PW16 PW15 PW14 PW13 PW12 PW11 PW10 port B (PTB1) with the bits (PW10 to PW17) of PWM1.
Sets the pulse width to be output from general-purpose
1 1 0 0 1 1 1 0 PW27 PW26 PW25 PW24 PW23 PW22 PW21 PW20 port B (PTB2) with the bits (PW20 to PW27) of PWM2.
F
Test register set
11001 1 1 1 –
–
–
T5
T4
T3
T2
T1
Test instruction exclusively used by manufacturer (T1 to
T5). Customers must not use this instruction.
Notes:
R/W
ST0 to ST2
S0 to S4
D0 to D7
X0 to X3
Y0 to Y3
PTA0
PTB0 to PTB2
PTC0 to PTC4
PTD0 to PTD4
INC
WLS
KT
SHL
BE
: Read/write select bit
1:Read, 0: Write
: Key scan read count display bits
: Key scan data
: Write or read data of the display data RAM
: X addresses of the display data RAM
: Y addresses of the display data RAM
: Port A data
: Port B output control
1: Output enable, 0: Fixed at “L”
: Port C data
: Port D data
: Display data RAM address increment. 1: X direction, 0: Y direction
: Word length select bit
1: 6 bits, 0: 8 bits
: Key scan period select bit
1: 10 ms, 0: 0.5 ms
: Common driver shift direction select bit
1: COM10COM1, 0: COM1COM10
: Voltage doubler control bit
1: Voltage doubler enable
0: Voltage doubler disable
PE
DTY0, DTY1
DISP
Q1 to Q4
CT0 to CT3
PW00 to PW07
PW10 to PW17
PW20 to PW2
T1 to T5
–
: Port enable/disable select bit 1: All ports enable
0: All ports go into high impedance for output
: Display duty select bits (1/8, 1/9, 1/10)
: Display ON/OFF select bit
1: Display ON, 0: Display OFF
: Rotary encoder switch count bits (2’s complement)
: Contrast adjustment bit
: PWM0 setting bits
: PWM1 setting bits
: PWM2 setting bits
: Bits for test instruction. Customers should not access these bits.
: Don’t Care
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