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FEDL9205-02
ML9205-01
2nd byte
(7th)
6th byte
(11th)
2nd byte
(12th)
6th byte
(16th)
2nd byte
(77th)
6th byte
(81th)
2nd byte
(82th)
6th byte
(86th)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C5 C10 C15 C20 C25 C30 * :
specifies 1st column data
(written into CGRAM address 01H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C4 C9 C14 C19 C24 C29 C34 * :
specifies 5th column data
(written into CGRAM address 01H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C5 C10 C15 C20 C25 C30 * :
specifies 1st column data
(written into CGRAM address 02H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C4 C9 C14 C19 C24 C29 C34 * :
specifies 5th column data
(written into CGRAM address 02H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C5 C10 C15 C20 C25 C30 * :
specifies 1st column data
(written into CGRAM address 0FH)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C4 C9 C14 C19 C24 C29 C34 * :
specifies 5th column data
(written into CGRAM address 0FH)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C5 C10 C15 C20 C25 C30 * :
specifies 1st column data
(CGRAM address 00H is written)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C4 C9 C14 C19 C24 C29 C34 * :
specifies 5th column data
(CGRAM address 00H is written)
X0 (LSB) to X3 (MSB): CGRAM addresses (4 bits: 16 characters)
C0 (LSB) to C34 (MSB) : Character pattern data (35 bits: 35 outputs per digit)
* : Don't care
19/34