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ML9208-XXGA View Datasheet(PDF) - LAPIS Semiconductor Co., Ltd.

Part Name
Description
MFG CO.
'ML9208-XXGA' PDF : 33 Pages View PDF
FEDL9208-02
ML9208
5. Display duty set
(writes display duty value to duty cycle register)
Display duty adjusts contrast in 8 stages using 3-bit data.
When power is turned on or when the RESET signal is input, the duty cycle register value is “0”. Always
execute this instruction before turning the display on, then set a desired duty value.
[Command format]
1st byte
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
D0 D1 D2 * 1 0 1 0 : selects display duty set mode and sets duty value
D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages)
* : don’t care
[Relation between setup data and controlled COM duty]
HEX D0 D1 D2 COM duty
0
0
0
0
8/16
 (The state when power is turned on or when RESET signal
1
1
0
0
9/16
is input.)
2
0
1
0
10/16
3
1
1
0
11/16
4
0
0
1
12/16
5
1
0
1
13/16
6
0
1
1
14/16
7
1
1
1
15/16
22/33
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