MP8831AS View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'MP8831AS' PDF : 16 Pages View PDF
MP8831
1
CNTL-A
0
1
CNTL-B
0
t11 Pass-through Input Data
AD[7:0]
(Input)
ADC Output Data
t10
Data A
t12
Data B
t12
Data C
t12
t13
t14
t15
ADC Output Data
DA[7:0]
(Output)
DAC Data Input
Data A
Pass-Through output data
Data B
Data C
Figure 4. Pass-Through Mode (AD=>DA) Timing Diagram
1
CNTL-A
0
1
CNTL-B
0
t16
AD[7:0]
(Output)
ADC Data Output
Pass-Through Output Data
Data A
Data B
DA[7:0]
(Input)
Data A
Pass-through Input Data
t17
t17
Data B
Data C
Data C
t18
ADC Data Output
Figure 5. Pass-Through mode (DA=>AD) Timing Diagram
OPERATION MODES
The two signals CNTL-A & CNTL-B are used to put the
chip into one of the four operation modes.
Convert Mode (CNTL-A=high, CNTL-B=high)
This is the normal operation mode. Data for the offset &
gain DACs is read in from the DA bus, and ADC data is
output on the AD bus.
Pass-Through Mode
AD => DA (CNTL-A=low, CNTL-B=high)
DA => AD (CNTL-A=high, CNTL-B=low)
The pass-through modes are intended to allow the digital
ASIC (or µprocessor, DSP, etc) to read from and write to
the memory bank which holds the gain and offset DAC
data, without requiring a separate data bus between the
ASIC and the memory. In the AD => DA mode, pins
AD[7:0] are programmed as digital inputs, and they
simply pass data (through an internal bus) to pins DA[7:0]
which are programmed as digital outputs. In the DA => AD
mode things are reversed, DA[7:0] are programmed as
Rev. 1.00
9
Share Link: 
