3
2
SS
1
SCK Input
(CPOL = 0)
4
4
SCK Input
(CPOL = 1)
5
11
12
6
SOUT
SIN
First Data
Data
9
First Data
Data
Last Data
10
Last Data
Note: Numbers shown reference Table 49.
Figure 31. DSPI modified transfer format timing–slave, CPHA = 0
SS
SCK Input
(CPOL = 0)
SCK Input
(CPOL = 1)
11
5
12
6
SOUT
First Data
Data
Last Data
9
10
SIN
First Data
Data
Last Data
Note: Numbers shown reference Table 49.
Figure 32. DSPI modified transfer format timing–slave, CPHA = 1
MPC5646C Microcontroller Data Sheet, Rev. 3
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
95