MPC8349VVALDB View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MPC8349VVALDB

PowerQUICC II Pro Integrated Host Processor Hardware Specifications

Freescale Semiconductor 

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JTAG

Figure 30 provides the boundary-scan timing diagram.

JTAG

External Clock

VM

Boundary

Data Inputs

Boundary

Data Outputs

tJTKLDX

tJTKLDV

tJTDVKH

VM

Input

Data Valid

tJTDXKH

Output Data Valid

Boundary

Data Outputs

tJTKLDZ

Output Data Valid

VM = Midpoint Voltage (OVDD/2)

Figure 30. Boundary-Scan Timing Diagram

Figure 31 provides the test access port timing diagram.

JTAG

External Clock

VM

TDI, TMS

TDO

tJTKLOX

tJTKLOV

tJTIVKH

VM

Input

Data Valid

tJTIXKH

Output Data Valid

TDO

tJTKLOZ

Output Data Valid

VM = Midpoint Voltage (OVDD/2)

Figure 31. Test Access Port Timing Diagram

MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13

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Freescale Semiconductor

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