MPC9449 Data Sheet
3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
DSELA
CCLK0
CCLK1
CCLK_SEL
PCLK
PCLK
PCLK_SEL
DSELB
DSELC
DSELD
MR/OE
PACKAGE DIMENSIONS
0
QA0
VCC
1
QA1
0
0
QB0
1
1
0
1
QB1
VCC
2
1
QB2
QC0
0
QC1
1
QC2
QC3
QD0
QD1
0
QD2
1
QD3
QD4
QD5
Figure 1. MPC9449 Logic Diagram
NC
VCC
QB2
GND
QB1
VCC
QB0
GND
GND
QA1
VCC
QA0
GND
4039 38 37 36 35 34 33 32 31 30 29 28 2726
41
25
42
24
43
23
44
22
45
21
46
MPC9449
20
47
19
48
18
49
17
50
16
51
15
52
14
1 2 3 4 5 6 7 8 9 10 11 12 13
NC
VCC
QD4
GND
QD3
VCC
QD2
GND
QD1
VCC
QD0
GND
NC
Figure 2. PC9449 52-Lead Package Pinout (Top View)
MPC9449 REVISION 6 MARCH 15, 2016
2
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