MSM514252A-10JS View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
'MSM514252A-10JS' PDF : 33 Pages View PDF
¡ Semiconductor
MSM514252A
POWER-UP
Power must be applied to the RAS and DT/OE input signals to pull them "high" before or at the
same time as the VCC supply is turned on. After power-up, a pause of 200µ seconds (minimum)
is required with RAS and DT/OE held "high".
After the pause, a minimum of 8 RAS and 8 SC dummy cycles must be performed to stabilize the
internal circuitry, before valid read, write or transfer operations can begin. During the
initialization period, the DT/OE signal must be held "high". If the internal refresh counter is
used, a minimum 8 CAS-before-RAS initialization cycles are required instead of 8 RAS cycles.
Initial State After Power-up
When power is achieved with RAS, CAS, DT/OE and WB/WE held "high" the internal state of
the MSM514252A is automatically set as follows.
SAM port ------------------- Æ Input mode
Write mask register ------ Æ Write mode
TAP pointer ---------------- Æ Invalid
However, the initial state can not be guaranteed for various power-up conditions and input
signal levels. Therefore, it is recommended that the initial state be set after the initialization of
the device is performed (200µ seconds pause followed by a minimum of 8 RAS cycles and 8 SC
cycles) and before valid operations begin.
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