¡ Semiconductor
Parameter
Address Hold Time for WR Rising
WR Pulse Width
Data Setup Time for WR Rising
Symbol
tWA
tWW
tDW
Data Hold Time for WR Rising
tWD
Defined Data Output Time
From WR Rising
tWB
Port Data Hold Time for RD Rising
tHR
ACK Pulse Width
tAK
STB Pulse Width
tST
Port Data Hold Time for STB Falling
tPH
ACK Falling to Defined Data Output
tAD
WR Falling to OBF Falling Delay Time tWOB
ACK Falling to OBF Rising Delay Time tAOB
STB Falling to IBF Rising Delay Time
tSIB
RD Rising to IBF Falling Delay Time
tRIB
RD Falling to INTR Falling Delay Time tRIT
STB Rising to INTR Rising Delay Time tSIT
ACK Rising to INTR Rising Delay Time tAIT
WR Falling to INTR Falling Delay Time tWIT
MSM82C55A-2RS/GS/VJS
MSM82C55A-5
30 ns minimum
300 ns minimum
1000 ns minimum
40 ns minimum
350 ns maximum
20 ns minimum
300 ns minimum
300 ns minimum
180 ns minimum
300 ns maximum
650 ns maximum
350 ns maximum
300 ns maximum
300 ns maximum
400 ns maximum
300 ns maximum
350 ns maximum
850 ns minimum
MSM82C55A-2
20 ns minimum
150 ns minimum
50 ns minimum
30 ns minimum
200 ns maximum
10 ns minimum
100 ns minimum
100 ns minimum
50 ns minimum
150 ns maximum
150 ns maximum
150 ns maximum
150 ns maximum
150 ns maximum
200 ns maximum
150 ns maximum
150 ns maximum
250 ns maximum
As shown above, the MSM82C55A-2 satisfies the characteristics of the MSM82C55A-5.
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