2Mb
SMART 5 BOOT BLOCK FLASH MEMORY
SPEED-DEPENDENT WRITE/ERASE AC TIMING CHARACTERISTICS AND RECOM-
MENDED AC OPERATING CONDITIONS: CE#-CONTROLLED WRITES
Commercial Temperature (0°C ≤ TA ≤ +70°C) and Extended Temperature (-40°C ≤ TA ≤ +85°C); VCC = +5V ±10% or
+5V ±5%
AC CHARACTERISTICS
PARAMETER
Address setup time to CE# HIGH
Address hold time from CE# HIGH
Data setup time to CE# HIGH
Data hold time from CE# HIGH
WE# setup time to CE# LOW
WE# hold time from CE# HIGH
VPP setup time to CE# HIGH
RP# HIGH to CE# LOW delay
RP# at VHH or WP# HIGH setup time to CE# HIGH
WRITE duration (WORD or BYTE WRITE)
Boot BLOCK ERASE duration
Parameter BLOCK ERASE duration
Main BLOCK ERASE duration
CE# HIGH to busy status (SR7 = 0)
VPP hold time from status data valid
RP# at VHH or WP# HIGH hold time from status data valid
Boot block relock delay time
SYMBOL
tAS
tAH
tDS
tDH
tWS
tWH
tVPS1
tRS
tRHS
tWED1
tWED2
tWED3
tWED4
tWB
tVPH
tRHH
tREL
-6/-8/-8 ET
MIN
MAX
50
0
50
0
0
0
200
500
100
6
300
300
600
200
0
0
100
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
ms
ms
ns
ns
ns
ns
NOTES
1
2
3
2, 3
3
3
4
3
2
5
WORD/BYTE WRITE AND ERASE DURATION CHARACTERISTICS
PARAMETER
Boot/parameter BLOCK ERASE time
Main BLOCK ERASE time
Main BLOCK WRITE time (byte mode)
Main BLOCK WRITE time (word mode)
TYP MAX UNITS NOTES
0.5 7
s
6
1.5 14
s
6
1–
s 6, 7, 8
1–
s 6, 7, 8
NOTE: 1. Measured with VPP = VPPH1 = 5V.
2. RP# should be held at VHH or WP# held HIGH until boot block WRITE or ERASE is complete.
3. WRITE/ERASE times are measured to valid status register data (SR7 = 1).
4. Polling status register before tWB is met may falsely indicate WRITE or ERASE completion.
5. tREL is required to relock boot block after WRITE or ERASE to boot block.
6. Typical values measured at TA = +25°C.
7. Assumes no system overhead.
8. Typical WRITE times use checkerboard data pattern.
2Mb Smart 5 Boot Block Flash Memory
F50.p65 – Rev. 1/00
26
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.