MT48H8M32LFBF-8LG View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-8LG' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Operations
Figure 15: READ-to-WRITE with Extra Clock Cycle
T0
T1
T2
T3
CLK
DQM
T4
T5
COMMAND
READ
NOP
NOP
NOP
NOP
WRITE
ADDRESS
BANK,
COL n
DQ
tHZ
DOUT n
BANK,
COL b
DIN b
tDS
DON’T CARE
Note:
CL = 3. The READ command may be to any bank, and the WRITE command may be to any
bank.
Figure 16: READ-to-PRECHARGE
T0
T1
T2
T3
T4
T5
T6
T7
CLK
COMMAND
READ
NOP
NOP
t RP
NOP
PRECHARGE
NOP
NOP
ACTIVE
ADDRESS
BANK a,
COL n
X = 1 cycle
BANK
(a or all)
BANK a,
ROW
DQ
T0
CLK
CL = 2
T1
COMMAND
READ
NOP
ADDRESS
BANK a,
COL n
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
T2
T3
T4
T5
T6
T7
t RP
NOP
NOP
PRECHARGE
NOP
NOP
ACTIVE
BANK
(a or all)
X = 2 cycles
BANK a,
ROW
DQ
Note: DQM is LOW.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
CL = 3
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
DON’T CARE
28
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