MT48LC32M16A2P-7ELC View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC32M16A2P-7ELC' PDF : 68 Pages View PDF
512Mb: x4, x8, x16 SDRAM
Operations
the PRECHARGE command is that it requires that the command and address buses be
available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts.
Fixed-length or full-page WRITE bursts can be truncated with the BURST TERMINATE
command. When truncating a WRITE burst, the input data applied coincident with the
BURST TERMINATE command will be ignored. The last data written (provided that
DQM is LOW at that time) will be the input data applied one clock previous to the
BURST TERMINATE command. This is shown in Figure 23 on page 32, where data n is
the last desired data element of a longer burst.
Figure 22: WRITE-to-PRECHARGE
T0
T1
T2
T3
CLK
T4
T5
T6
tWR @ tCLK > 15ns
DQM
COMMAND
WRITE
NOP
PRECHARGE
t RP
NOP
NOP
ACTIVE
NOP
ADDRESS
DQ
BANK a,
COL n
DIN
n
BANK
(a or all)
t WR
DIN
n+1
BANK a,
ROW
tWR = tCLK < 15ns
DQM
COMMAND
WRITE
NOP
ADDRESS
BANK a,
COL n
DQ
DIN
n
DIN
n+1
NOP
PRECHARGE
t RP
NOP
NOP
BANK
(a or all)
t WR
ACTIVE
BANK a,
ROW
Note:
Transitioning Data
Don’t Care
DQM could remain LOW in this example if the WRITE burst is a fixed length of two.
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
31
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