MT48LC4M32B2P-6IT View Datasheet(PDF) - Micron Technology

Part Name

Description

MFG CO.

MT48LC4M32B2P-6IT

1 Meg x 32 x 4 Banks SDR SDRAM

Micron Technology 

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128Mb: x32 SDRAM

SELF REFRESH Operation

Figure 47: Self Refresh Mode

T0

CLK

tCK

T1

tCH

T2

tCL

tCKS

((

))

((

))

CKE

tCKS tCKH

tCMS tCMH

Command PRECHARGE

NOP

DQM

((

))

((

AUTO

))

REFRESH

((

))

((

))

((

))

Tn + 1

( ( To + 1

))

((

))

((

))

((

))

((

NOP

))

((

))

((

))

((

))

To + 2

AUTO

REFRESH

Address

A10

BA0, BA1

All banks

Single bank

tAS tAH

Bank(s)

((

((

))

))

((

((

))

))

((

((

))

))

((

((

))

))

((

((

))

))

((

((

))

))

DQ High-Z

Precharge all

active banks

((

tRP

))

Enter self refresh mode

((

))

tXSR

Exit self refresh mode

(Restart refresh time base)

CLK stable prior to exiting

self refresh mode

Don’t Care

Note: 1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are

not required.

PDF: 09005aef80872800

128mb_x32_sdram.pdf - Rev. U 04/13 EN

75

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