MT48LC4M32LFFF View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC4M32LFFF' PDF : 61 Pages View PDF
Figure 8
Random READ Accesses
T0
T1
T2
T3
T4
CLK
ADVANCE
128Mb: x16, x32
MOBILE SDRAM
COMMAND
READ
READ
READ
READ
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
CAS Latency = 1
DOUT
a
DOUT
x
DOUT
m
T0
T1
T2
T3
CLK
T4
T5
COMMAND
READ
READ
READ
READ
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
DOUT
a
CAS Latency = 2
DOUT
x
DOUT
m
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
READ
READ
READ
NOP
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
DOUT
a
CAS Latency = 3
NOTE: Each READ command may be to either bank. DQM is LOW.
DOUT
x
DOUT
m
DON’T CARE
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
20
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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