MT48LC64M8A2P-7ELC View Datasheet(PDF) - Micron Technology

Part Name

Description

MFG CO.

MT48LC64M8A2P-7ELC

Synchronous DRAM

Micron Technology 

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Figure 36: Auto-Refresh Mode

T0

T1

CLK

tCK

CKE

tCKS

tCKH

tCMS tCMH

COMMAND

PRECHARGE

NOP

DQM /

DQML, DQMH

A0–A9,

A11, A12

A10

ALL BANKS

SINGLE BANK

tAS tAH

BA0, BA1

BANK(S)

DQ High-Z

tRP

Precharge all

active banks

512Mb: x4, x8, x16 SDRAM

Timing Diagrams

T2

((

))

tCH

((

))

((

))

Tn + 1

tCL

To + 1

((

))

((

))

((

))

AUTO

REFRESH

((

))

NOP( ( NOP

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

tRFC

AUTO

REFRESH

((

))

NOP( ( NOP

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

tRFC

ACTIVE

ROW

ROW

BANK

Don’t Care

PDF: 09005aef809bf8f3/Source: 09005aef80818a4a

512MbSDRAM.fm - Rev. L 10/07 EN

52

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2000 Micron Technology, Inc. All rights reserved.

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