READ – DQM OPERATION1
T0
T1
T2
T3
T4
T5
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
READ
NOP
NOP
NOP
tCMS tCMH
DQMU, DQML
A0-A9, A11
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
COLUMN m 2
ENABLE AUTO PRECHARGE
DISABLE AUTO PRECHARGE
BANK
DQ
tRCD
tAC
tLZ
CAS Latency
tOH
DOUT m
tHZ
tAC
tLZ
ADVANCE
128Mb: x16, x32
MOBILE SDRAM
T6
T7
T8
NOP
NOP
NOP
tAC
tOH
DOUT m + 2
tOH
DOUT m + 3
tHZ
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL*
tAC (3)
tAC (2)
tAC (1)
tAH
tAS
tCH
tCL
tCK (3)
tCK (2)
tCK (1)
-8
MIN MAX
7
8
19
1
2.5
3
3
8
10
20
-10
MIN MAX
7
8
22
1
2.5
3
3
10
12
25
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL*
tCKH
tCKS
tCMH
tCMS
tHZ (3)
tHZ (2)
tHZ (1)
tLZ
tOH
tRCD
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, and the CAS latency = 2.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
-8
MIN MAX
1
2.5
1
2.5
7
8
19
1
2.5
20
-10
MIN MAX
1
2.5
1
2.5
7
8
22
1
2.5
20
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
51
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.