MT48V4M32LFFF-8 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48V4M32LFFF-8' PDF : 61 Pages View PDF
PRECHARGE command is that it requires that the com-
mand and address buses be available at the appropriate
time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate
fixed-length or full-page bursts.
Full-page READ bursts can be truncated with the
BURST TERMINATE command, and fixed-length READ
bursts may be truncated with a BURST TERMINATE com-
ADVANCE
128Mb: x16, x32
MOBILE SDRAM
mand, provided that auto precharge was not activated.
The BURST TERMINATE command should be issued x
cycles before the clock edge at which the last desired data
element is valid, where x equals the CAS latency minus
one. This is shown in Figure 12 for each possible CAS
latency; data element n + 3 is the last desired data ele-
ment of a longer burst.
Figure 12
Terminating a READ Burst
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
NOP
NOP
ADDRESS
BANK,
COL n
NOP
BURST
NOP
NOP
TERMINATE
X = 0 cycles
DQ
DOUT
n
CAS Latency = 1
DOUT
n+1
DOUT
n+2
DOUT
n+3
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
NOP
NOP
ADDRESS
BANK,
COL n
NOP
BURST
NOP
NOP
TERMINATE
X = 1 cycle
DQ
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
CAS Latency = 2
T0
T1
T2
T3
T4
T5
T6
T7
CLK
COMMAND
READ
NOP
NOP
ADDRESS
BANK,
COL n
DQ
CAS Latency = 3
NOTE: DQM is LOW.
NOP
BURST
NOP
TERMINATE
NOP
NOP
X = 2 cycles
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
DON’T CARE
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
23
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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