MT4LC1M16E5 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT4LC1M16E5' PDF : 24 Pages View PDF
RAS#
V IH
V IL
CASL#/
CASH#
V IH
V IL
DQ
V OH
V OL
WE#
V
V
IH
IL
16Mb: 1 MEG x16
EDO DRAM
SELF REFRESH CYCLE
(Addresses and OE# = DON’T CARE)
tRP
tRPC
tCP
tRASS
tCSR
tCHD
tWRP
tWRH
((
))
((
))
((
))
((
))
((
))
OPEN
((
))
((
))
NOTE 1
tRPS
tRPC
tCP
NOTE 2
((
))
tWRP
tWRH
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tCHD
tCLCH
tCP
tCSR
tRASS
-5
MIN
MAX
15
5
8
5
100
-6
MIN
MAX
15
5
10
5
100
UNITS
ns
ns
ns
ns
µs
SYMBOL
tRP
tRPC
tRPS
tWRH
tWRP
MIN
30
5
90
8
8
-5
MAX
MIN
40
5
105
10
10
-6
MAX
UNITS
ns
ns
ns
ns
ns
NOTE: 1. Once tRASS (MIN) is met and RAS# remains LOW, the DRAM will enter self refresh mode.
2. Once tRPS is satisfied, a complete burst of all rows should be executed.
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc
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