MX29L3211
Figure 13. COMMAND WRITE TIMING WAVEFORMS(Alternate CE Controlled)
WE
tOES
tWS
OE
CE
ADDRESSES
tGHWL
tAS
tCP
tAH
VALID
tWH
tWC
tCPH
DATA
(D/Q)
HIGH Z
tDS
tDH
DIN
VCC
tVCS
NOTE:
1. BYTE pin is treated as Address pin. All timing specifications for BYTE pin are the same as those for address pin.
2. BYTE pin is sampled on the falling edge of WE or CE during the 3rd command write bus cycle; for real world applicaton,
BYTE pin should be either static high(word mode) or static low(byte mode).
P/N:PM0641
REV. 0.3, NOV. 06, 2001
31