N25Q128A23ESF40F View Datasheet(PDF) - Numonyx -> Micron

Part Name

Description

MFG CO.

N25Q128A23ESF40F

128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Numonyx -> Micron 

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Operating features

N25Q128 - 3 V

the reset mode and a time of tRHSL is then required before the device can be reselected by

driving Chip Select (S) Low. For the value of tRHSL, see Table 32.: AC Characteristics. All

the lock bits are reset to 0 after a Reset Low pulse.

The Hold/Reset feature is not available when the Hold (Reset) / DQ3 pin is used as I/O

(DQ3 functionality) during Quad Instructions: QOFR, QIOFR,QIFP and QIEFP.

The Hold/Reset feature can be disabled by using of the bit 4 of the VECR.

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