N80C151SA View Datasheet(PDF) - Intel
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MFG CO.
'N80C151SA' PDF : 33 Pages View PDF
8XC151SA SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER
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The value of this parameter depends on wait states See the table of AC characteristics
A page hit (i e a code fetch to the same 256-byte ‘‘page’’ as the previous code fetch) requires one state (2TOSC)
a page miss requires two states (4TOSC)
During a sequence of page hits PSEN remains low until the end of the last page-hit cycle
Figure 11 External Instruction Bus Cycle in Page Mode
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