P2V28S20ATP-7 View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'P2V28S20ATP-7' PDF : 51 Pages View PDF
128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
[Read Interrupted by Burst Terminate] READ to TBST interval is minimum 1 CLK. A TBST command to
Similarly to the precharge, a burst terminate command can inter- output disable latency is equivalent to the /CAS Latency.
rupt the burst read operation and disable the data output. The
terminated bank remains active.
Read Interrupted by Terminate (BL=4)
CLK
CL=3
Command
DQ
Command
DQ
Command
DQ
READ
READ
TBST
Q0 Q1 Q2
TBST
Q0 Q1
READ TBST
Q0
CL=2
Command
DQ
Command
DQ
Command
DQ
READ
TBST
Q0 Q1 Q2
READ
TBST
Q0 Q1
READ TBST
Q0
JULY.2000
Page-22
Rev.2.2
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