P2V28S20ATP-7 View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'P2V28S20ATP-7' PDF : 51 Pages View PDF
128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
SWITCHING CHARACTERISTICS
(Ta=0 - 70˚C, Vdd=VddQ=3.3±0.3V,Vss=VssQ=0V, unless otherwise noted)
Symbol
Parameter
tAC Access time from CLK
tOH
tOLZ
Output Hold time
from CLK
Delay time , output low-
impedance from CLK
CL=2
CL=3
CL=2
CL=3
Limits
-7
-7.5
Min.
Max.
Min.
Max.
6
5.4
5.4
3
2.7
3
0
0
Delay time , output high-
tOHZ impedance from CLK
2.7
5.4
3
5.4
NOTE:
1. If clock rising time is longer than 1ns,(tr/2-0.5ns) should be added to the parameter.
-8
Min.
Max.
6
6
3
3
Unit Note
ns
ns
ns
ns *1
0
ns
3
6
ns
Output Load Condition
VOUT
50pF
CLK
1.4V
DQ
1.4V
Output Timing Measurement
Reference Point
CLK
1.4V
tOLZ
DQ
1.4V
tAC
tOH
tOHZ
JULY.2000
Page-34
Rev.2.2
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