128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
Self Refresh
CLK
/CS
/RAS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
tRFC
tRP
/CAS
/WE
CKE
DQM
A0-8,
X
A10
X
A9,11
X
BA0,1
0
DQ
PRE ALL Self Refres h Entry
Self Refres h Exit
ACT#0
All banks m ust be idle before REFS is issued.
Italic parameter indicates minimum case
JULY.2000
Page-47
Rev.2.2