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P4C1023-55CWM View Datasheet(PDF) - Semiconductor Corporation

Part Name
Description
MFG CO.
P4C1023-55CWM
PYRAMID
Semiconductor Corporation PYRAMID
'P4C1023-55CWM' PDF : 11 Pages View PDF
1 2 3 4 5 6 7 8 9 10
P4C1023/P4C1023L
READ CYCLE NO. 1 (OE CONTROLLED)(1)
READ CYCLE NO. 2 (ADDRESS CONTROLLED)
READ CYCLE NO. 3 (CE CONTROLLED)
Notes:
1. WE is HIGH for READ cycle.
2. CE and OE are LOW for READ cycle.
3. ADDRESS must be valid prior to, or coincident with later of
CE transition LOW.
4. Transition is measured ± 200 mV from steady state voltage prior
to change, with loading as specified in Figure 1. This parameter
is sampled and not 100% tested.
5. READ Cycle Time is measured from the last valid address to the
first transitioning address.
Document # SRAM126 REV OR
Page 4 of 11
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