NXP Semiconductors
PCF8532
Universal LCD driver for low multiplex rates
9. Limiting values
CAUTION
Static voltages across the liquid crystal display can build up when the LCD supply voltage
(VLCD) is on while the IC supply voltage (VDD) is off, or vice versa. This may cause unwanted
display artifacts. To avoid such artifacts, VLCD and VDD must be applied or removed together.
Table 16. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol Parameter
Conditions
Min
VDD
IDD
VLCD
IDD(LCD)
VI
supply voltage
supply current
LCD supply voltage
LCD supply current
input voltage
−0.5
−50
−0.5
−50
on pins CLK, SYNC,
−0.5
SA0, OSC, SDA, SCL
and A0, A1, T1, T2, T3
II
input current
VO
output voltage
−10
on pins S0 to S159 and −0.5
BP0 to BP3
on pins SDAACK,
−0.5
CLK, SYNC
IO
output current
−10
ISS
ground supply current
−50
Ptot
total power dissipation
-
P/out power dissipation per output
-
Tstg
storage temperature
Vesd
electrostatic discharge
voltage
HBM
[2] −65
[3] -
MM
[4] -
Ilu
latch-up current
[5] -
Max
+6.5
+50
+9.0
+50
+6.5
+10
+7.5
+6.5
+10
+50
400
100
+150
±4500
±250
200
Unit
V
mA
V
mA
V
mA
V
V
mA
mA
mW
mW
°C
V
V
mA
[1] Stresses above these values listed may cause permanent damage to the device.
[2] According to the NXP store and transport conditions (document SNW-SQ-623) the devices have to be
stored at a temperature of +5 °C to +45 °C and a humidity of 25 % to 75 %.
[3] Pass level; Human Body Model (HBM) according to JESD22-A114.
[4] Pass level; Machine Model (MM), according to JESD22-A115.
[5] Pass level; Latch-up testing, according to JESD78.
PCF8532_1
Product data sheet
Rev. 1 — 10 February 2009
© NXP B.V. 2009. All rights reserved.
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