PC8532-1 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PC8532-1' PDF : 44 Pages View PDF
NXP Semiconductors
PCF8532
Universal LCD driver for low multiplex rates
Alternatively the schematic can be also constructed such that all the devices have OSC
pin connected to VDD and thus an external CLK being provided for the system (all devices
connected to the same external CLK).
A configuration where SYNC is connected but all PCF8532 are using the internal clock
(OSC pin tied to VSS) is not recommended and may lead to display artefacts!
Table 19. SYNC contact resistance
Number of devices
2
3 to 5
6 to 8
Maximum contact resistance
6000 Ω
2200 Ω
1200 Ω
VLCD
VDD
R
≤
tr
2CB
HOST
MICRO-
PROCESSOR/
MICRO-
CONTROLLER
SDAACK
SDA
SCL
VDD VLCD
160/80/40
segment drives
SYNC
CLK
PCF8532
(2)
OSC
A0 A1 SA0
BP0 to BP3
VSS (open-circuit)
LCD PANEL
(up to 2560
elements)
SDAACK
VDD VLCD
SDA
160 segment drives
SCL
SYNC
CLK
OSC
PCF8532
(1)
4 backplanes
BP0 to BP3
VSS
A0 A1 SA0
VSS
001aah855
(1) Is master (OSC connected to VSS).
(2) Is slave (OSC connected to VDD).
Fig 21. Cascaded configuration with two PCF8532’s using the internal clock of the
master
PCF8532_1
Product data sheet
Rev. 1 — 10 February 2009
© NXP B.V. 2009. All rights reserved.
33 of 44
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