PCA9517DRG4 View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
Part Name
Description
MFG CO.
'PCA9517DRG4' PDF : 17 Pages View PDF
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PCA9517
LEVEL-TRANSLATING I2C BUS REPEATER
SCPS157A – DECEMBER 2007 – REVISED FEBRUARY 2008
APPLICATION INFORMATION
A typical application is shown in Figure 5. In this example, the system master is running on a 3.3-V I2C bus, and
the slave is connected to a 1.2-V bus. Both buses run at 400 kHz. Master devices can be placed on either bus.
The PCA9517 is 5-V tolerant, so it does not require any additional circuitry to translate between 0.9-V to 5.5-V
bus voltages and 2.7-V to 5.5-V bus voltages.
When the A side of the PCA9517 is pulled low by a driver on the I2C bus, a comparator detects the falling edge
when it goes below 0.3 VCCA and causes the internal driver on the B side to turn on, causing the B side to pull
down to about 0.5 V. When the B side of the PCA9517 falls, first a CMOS hysteresis-type input detects the
falling edge and causes the internal driver on the A side to turn on and pull the A-side pin down to ground. In
order to illustrate what would be seen in a typical application, refer to Figure 7 and Figure 8. If the bus master in
Figure 5 were to write to the slave through the PCA9517, waveforms shown in Figure 7 would be observed on
the A bus. This looks like a normal I2C transmission, except that the high level may be as low as 0.9 V, and the
turn on and turn off of the acknowledge signals are slightly delayed.
On the B-side bus of the PCA9517, the clock and data lines would have a positive offset from ground equal to
the VOL of the PCA9517. After the eighth clock pulse, the data line is pulled to the VOL of the slave device, which
is very close to ground in this example. At the end of the acknowledge, the level rises only to the low level set by
the driver in the PCA9517 for a short delay, while the A-bus side rises above 0.3 VCCA and then continues high. It
is important to note that any arbitration or clock stretching events require that the low level on the B-bus side at
the input of the PCA9517 (VIL) be at or below 0.4 V to be recognized by the PCA9517 and then transmitted to
the A-bus side.
3.3 V
1.2 V
10 kΩ
SDA
BUS
MASTER
400 kHz
SCL
10 kΩ
10 kΩ
V V CCB
CCA
SDAB SDAA
SCLB SCLA
PCA9517
EN
10 kΩ
SDA
SCL
SLAVE
400 kHz
BUS B
BUS A
Figure 5. Typical Application
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): PCA9517
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