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PCF212311 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
PCF212311
NXP
NXP Semiconductors. NXP
'PCF212311' PDF : 63 Pages View PDF
NXP Semiconductors
PCF2123
SPI Real time clock/calendar
Table 44. Static characteristics …continued
VDD = 1.1 V to 5.5 V; VSS = 0 V; Tamb = 40 °C to +85 °C; fosc = 32.768 kHz; quartz Rs = 15 kΩ; CL = 7 pF; unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Inputs
VIL
LOW-level input voltage
-
-
0.3VDD V
VIH
HIGH-level input voltage
0.7VDD -
-
V
VI
input voltage
on pins CE, SDI, SCL, OSCI,
0.5
-
CLKOE, CLKOUT
+5.5
V
ILI
input leakage current
VI = VDD or VSS on pins SDI, [3] -
0
-
μA
SCL, OSCI, CLKOE, CLKOUT
VI = VSS on pin CE
1
0
-
μA
Rpd
pull-down resistance
on pin CE
-
240
550
kΩ
Ci
input capacitance
on pins SDI, SCL, CLKOE and [4] -
-
7
pF
CE
Outputs
VO
output voltage
on pins CLKOUT and INT
[5] 0.5
-
on pin OSCO
0.5
-
+5.5
V
+5.5
V
on pin SDO
0.5
-
VOH
HIGH-level output voltage on pin SDO
0.8VDD -
VOL
LOW-level output voltage on pin SDO
VSS
-
on pins CLKOUT and INT;
VDD = 5 V;
IOL = 1.5 mA
VSS
-
IOH
HIGH-level output current output source current;
VOH = 4.6 V;
VDD = 5 V on pin SDO
1.5
-
IOL
LOW-level output current output sink current;
1.5
-
VOL = 0.4 V;
VDD = 5 V on pins INT, SDO
and CLKOUT
VDD + 0.5 V
VDD
V
0.2VDD V
0.4
V
-
mA
-
mA
ILO
output leakage current
VO = VDD or VSS
[3] -
0
CL(itg)
integrated load
capacitance
on pins OSCO and OSCI
[6] 3.3
7
-
μA
14
pF
Rs
series resistance
-
-
100
kΩ
[1] For reliable oscillator start at power-on: VDD = VDD(min) + 0.3 V.
[2] Timer source clock = 160 Hz, level of pins CE, SDI, and SCL is VDD or VSS.
[3] In case of an ESD event, the value may increase slightly.
[4] Implicit by design.
[5] Refers to external pull-up voltage.
[6]
Integrated load capacitance, CL(itg), is a calculation of COSCI and COSCO in series:
CL(itg)
=
-(---C----O----S---C---I------C----O----S---C---O----)- .
(COSCI + COSCO)
PCF2123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 27 April 2011
© NXP B.V. 2011. All rights reserved.
41 of 63
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