PCF2127 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF2127' PDF : 101 Pages View PDF
NXP Semiconductors
PCF2127
Accurate RTC with integrated quartz crystal for industrial applications
Table 83).
Table 83. INT operation (bit TI_TP = 1)
Source clock (Hz)
INT period (s)
n = 1[1]
4096
64
1
1⁄60
1⁄8192
1⁄128
1⁄64
1⁄64
[1] n = loaded countdown value. Timer stopped when n = 0.
n>1
1⁄4096
1⁄64
1⁄64
1⁄64
If the MSF or CDTF flag (register Control_2) is cleared before the end of the INT pulse,
then the INT pulse is shortened. This allows the source of a system interrupt to be cleared
immediately when it is serviced, that is, the system does not have to wait for the
completion of the pulse before continuing, see Figure 30 and Figure 31. Instructions for
clearing bit MSF and bit CDTF can be found in Section 8.11.6.
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(1) Indicates normal duration of INT pulse.
The timing shown for clearing bit MSF is also valid for the non-pulsed interrupt mode. That is, when
TI_TP is logic 0, where the INT pulse may be shortened by setting both bits MI and SI logic 0.
Fig 30. Example of shortening the INT pulse by clearing the MSF flag
PCF2127
Product data sheet
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(1) Indicates normal duration of INT pulse.
The timing shown for clearing CDTF is also valid for the non-pulsed interrupt mode. That is, when
TI_TP is logic 0, where the INT pulse may be shortened by setting CDTIE logic 0.
Fig 31. Example of shortening the INT pulse by clearing the CDTF flag
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Rev. 8 — 19 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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