PCF85133U/2DA/1Z View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF85133U/2DA/1Z' PDF : 53 Pages View PDF
NXP Semiconductors
PCF85133
Universal LCD driver for low multiplex rates
Table 18. Control byte description
Bit
Symbol Value
Description
7
CO
continue bit
0
last control byte
1
control bytes continue
6
RS
register selection
0
command register
1
data register
5 to 0 -
not relevant
The command bytes and control bytes are also acknowledged by all addressed
PCF85133s connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter. Both data pointer and subaddress counter are
automatically updated.
The acknowledgement after each byte is made only by the (A0, A1 and A2) addressed
PCF85133. After the last (display) byte, the I2C-bus master issues a STOP condition (P).
Alternatively a START may be asserted to RESTART an I2C-bus access.
9. Internal circuitry
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Fig 19. Device protection diagram
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PCF85133
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 4 July 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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