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7.2 Pin description
Table 4. Pin description
Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
Symbol
Pin
Type
PCF85263AT PCF85263ATL PCF85263ATT PCF85263ATT1
(SO8)
(DFN2626-10) (TSSOP8)
(TSSOP10)
OSCI
1
1
1
1
input
OSCO
2
2
2
2
output
VBAT
3
3
3
3
supply
TS (CLK/INTB) -
4
-
4
input/
output
VSS
4
5[3]
4
5
supply
SDA
5
6
5
6
input/
output
SCL
6
7
6
7
input
CLK
-
8
-
8
output
INTA (CLK)
7
9
7
9
output
VDD
8
10
8
10
supply
Description
Primary use
Secondary use
oscillator input
-
oscillator output
-
battery backup supply
-
voltage[1]
can be configured with TSPM[1:0][2]
timestamp input
INTB and CLK output
(push-pull); stop-watch
control
ground supply voltage
-
serial data line
-
serial clock input
-
CLK (push-pull)
-
can be configured with INTAPM[1:0][4]
interrupt output
(open-drain)
CLK output (open-drain)
supply voltage
-
[1] Connect to VDD if not used.
[2] See Table 7 and Table 47.
[3] The die paddle (exposed pad) is connected to VSS through high ohmic (non-conductive) silicon attach and should be electrically isolated. It is good engineering practice to solder
the exposed pad to an electrically isolated PCB copper pad as shown in Figure 45 “Package outline SOT1197-1 (DFN2626-10), PCF85263ATL” for better heat transfer but it is not
required as the RTC doesn’t consume much power. In no case should traces be run under the package exposed pad.
[4] See Table 7 and Table 49.