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PCF85263ATL/A View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
'PCF85263ATL/A' PDF : 100 Pages View PDF
NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
Table 20. TSR_mode - timestamp mode control register (address 23h) bit description
Bit
Symbol
Value
Description
Timestamp3 (TSR3)
7 to 6 TSR3M[1:0]
timestamp register 3 mode
00[1]
no timestamp
01
FB, record First time switch to Battery event
10
LB, record Last time switch to Battery event
5
-
11
LV, record Last time switch to VDD event
0
not used
Timestamp2 (TSR2)
4 to 2 TSR2M[2:0]
timestamp register 2 mode
000[1]
no timestamp
001
FB, record First time switch to Battery event
010
LB, record Last time switch to Battery event
011
LV, record Last time switch to VDD event
100
FE, record First TS pin Event
101
LE, record Last TS pin Event
110 to 111
no timestamp
Timestamp1 (TSR1)
1 to 0 TSR1M[1:0]
timestamp register 1 mode
00[1]
no timestamp
01
FE, record First TS pin Event
10
LE, record Last TS pin Event
11
no timestamp
[1] Default value.
First event means that the time is only stored on the first event and not recorded for
subsequent events. When the first event occurs, the associated timestamp flag is set.
When the flag is cleared, then a new ‘first’ event is recorded. See Figure 17 and
Figure 18.
Last event means that the time is stored on every event. When an event occurs, the
associated timestamp flag is set. It is not necessary to clear the flag before a new event is
recorded.
Interrupts can be generated in INTA pin and/or INTB pin. Interrupts are generated every
time a timestamp register is updated. Interrupt generation is not conditional on the state of
the timestamp flags. See Section 8.7.1.
PCF85263A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 27 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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