NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
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With the offset calibration an accuracy of 1 ppm (0.5 offset per LSB) can be reached (see
Table 25).
1 ppm corresponds to a time deviation of 0.0864 seconds per day.
(1) 4 correction pulses in OFFM = 0 correspond to 8.680 ppm.
(2) 4 correction pulses in OFFM = 1 correspond to 8.138 ppm.
(3) Reachable accuracy zone.
Fig 20. Result of offset calibration
8.8.4 Offset interrupts
The generation of interrupts from the offset functions is controlled via the offset interrupt
enable bits; OIEA and OIEB. These bits are in registers INTA_enable (address 29h) and
INTB_enable (address 2Ah).
Every time a correction pulse is made an interrupt pulse can be generated at pins INTA
and INTB. As there is no offset calibration flag, it is only possible to generate pulse
interrupts.
See Section 8.9 on page 38 for interrupt control.
8.9 Interrupts
There are two interrupt output pins, INTA and INTB. Both pins have the same possible
sources and a dedicated register to control what is output. The pins can be used
independently from each other.
INTA data is output on the INTA pin. INTA is an interrupt output pin with open-drain drive.
INTA pin mode is controlled by INTAPM[1:0] bits in the Pin_IO register (Section 8.12 on
page 50).
INTB data is output on TS pin with push-pull drive. The TS pin must first be configured as
INTB output by setting TSIO[1:0] bits in the Pin_IO register (Section 8.12 on page 50).
Interrupts will only be output when the pin mode is correctly defined. Interrupts are output
from the IC as active LOW signals.
The registers INTA_enable (address 29h) and INTB_enable (address 2Ah) are used to
select which interrupts should be output on which pin.
PCF85263A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 27 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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