PCF85263ATL/AX View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
PCF85263ATL/AX
NXP Semiconductors.
'PCF85263ATL/AX' PDF : 100 Pages View PDF
NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
• write data (clear prescaler, A4h)
• write data (100th seconds, 00h)
• write data (Hours, 14h)
• write data (Minutes, 23h)
• write data (Seconds, 19h)
• I2C START condition
• I2C slave address + write (A2h)
• register address (2Eh)
• write data (clear STOP, 00h). Time starts counting from this point
• I2C STOP condition
8.3 Stop-watch mode time registers
These registers are coded in the BCD format to simplify application use.
Stop-watch mode is enabled by setting RTCM = 1. In stop-watch mode, the PCF85263A
counts from 100th seconds to 999999 hours. There are no days, weekdays, months or
year registers.
Default state is:
Time — 000000:00:00.00
Monitor bits — OS = 1, EMON = 0 (see Section 8.2.2 on page 15 and Section 8.2.3 on
page 15)
Table 12. Time registers in stop-watch mode (RTCM = 1)
Bit positions labeled as - are not implemented and return 0 when read.
Address Register name Upper-digit (ten’s place)
Digit (unit place)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
00h
100th_seconds[1] 0 to 9
0 to 9
01h
Seconds
OS 0 to 5
0 to 9
02h
Minutes
EMON 0 to 5
0 to 9
03h
Hours_xx_xx_00 0 to 9
0 to 9
04h
Hours_xx_00_xx 0 to 9
0 to 9
05h
Hours_00_xx_xx 0 to 9
0 to 9
06h
not used
-
-
-
-
-
-
-
07h
not used
-
-
-
-
-
-
-
Bit 0
-
-
[1] The 100th_seconds register is only available when the 100TH mode is enabled, see Section 8.13.1 on
page 54. When the 100TH mode is disabled, this register always returns 0.
8.3.1 Setting and reading the time in stop-watch mode
Figure 11 shows the data flow and data dependencies starting from the 100 Hz clock tick.
During read operations, the time counting circuits (memory locations 00h through 07h) are
copied into an output register. The RTC continues counting in the background.
PCF85263A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 27 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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