NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
8.11.2 BSRR: battery switch internal refresh rate
Table 39. BSRR bit - battery switch control (address 26h) bit description
Bit
Symbol
Value
Description
3
BSRR
battery switch refresh rate
0[1]
low
1
high
[1] Default value.
Non-user bit. Recommended to leave set at default.
8.11.3 BSM[1:0]: battery switch mode
Table 40. BSM[1:0] bits - battery switch control (address 26h) bit description
Bit
Symbol
Value
Description
2 to 1 BSM[1:0]
battery switch mode bits
00[1]
01
10
11
switching at the Vth level
switching at the VBAT level
switching at the higher level of Vth or VBAT
switching at the lower level of Vth or VBAT
[1] Default value.
Switching is automatic and controlled by the voltages on the VBAT and VDD pins. There
are three modes:
• Compare VDD with an internal reference (Vth)
• Compare VDD with VBAT
• Compare VDD with an internal reference (Vth) and VBAT
The last mode is useful when a rechargeable battery is employed.
Table 41. Battery switch-over modes
BSM[1:0]
Condition
00
VDD > Vth
VDD < Vth
01
VDD > VBAT
VDD < VBAT
10
VDD > the higher of Vth or VBAT
VDD < the higher of Vth or VBAT
11
VDD > the lower of Vth or VBAT
VDD < the lower of Vth or VBAT
Internal power
VDD
VBAT
VDD
VBAT
VDD
VBAT
VDD
VBAT
Due to the nature of the power switch circuit there is a switching hysteresis (see Figure 23
and Table 68).
PCF85263A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 27 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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