NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
8.12.3 TSL: TS pin level sense
Table 46. TSL bit - Pin_IO control register (address 27h)
Bit
Symbol
Value
Description
5
TSL
TS pin input sense
0[1]
active HIGH
1
active LOW
[1] Default value.
The active state of the TS pin can be defined for use as a timestamp trigger and/or as stop
control for the time counting. Active HIGH implies a transition from logic 0 to logic 1 is
active. Active LOW implies a transition from logic 1 to logic 0 is active.
8.12.4 TSPM[1:0]: TS pin I/O control
Table 47. TSPM[1:0] bits - Pin_IO control register (address 27h)
Bit
Symbol
Value
Description
3 to 2 TSPM[1:0]
TS pin IO mode
00[1]
disabled; input can be left floating
01
INTB output; push-pull
10
CLK output; push-pull
11
input mode
[1] Default value.
These bits control the operation of the TS pin.
YGGBLQW
PHFKDQLFDO
VZLWFKGHWHFWRU
Nȍ
Nȍ
VDPSOH
VDPSOHFORFN
76/
LQYHUW
LQSXWGDWD
76&/.,17%SLQ
,17%GDWD
FORFNGDWD
(1) Not available on all package types.
Fig 28. TS pin
DDD
TSIM is only considered when the TS pin is in input mode.
8.12.4.1 TS pin output mode; INTB
It is possible to output INTB data on the TS pin. The output is push-pull. No output is
available when on VBAT. When on VBAT the output is Hi-Z.
PCF85263A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 27 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
51 of 100