PCF8533 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF8533' PDF : 45 Pages View PDF
NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
R/W = 0
slave address
control byte
S
0
1
1
1
0
0
S
A
0
0
A
C
O
R
S
RAM/command byte
M
AS
B
L
SP
B
EXAMPLES
a) transmit two bytes of RAM data
S
S01 1 1 0 0 A0A01
0
A
RAM DATA
A
RAM DATA
AP
b) transmit two command bytes
S
S01 1 1 0 0 A0A10
0
A
COMMAND
A0 0
A
COMMAND
AP
c) transmit one command byte and two RAM date bytes
S
S01 1 1 0 0 A0A10
A
0
COMMAND
A0 1
Fig 15. I2C-bus protocol
A
RAM DATA
A
RAM DATA
AP
mgl752
After acknowledgement, the control byte is sent defining if the next byte is a RAM or
command information. The control byte also defines if the next byte is a control byte or
further RAM or command data (see Figure 16 and Table 8). In this way it is possible to
configure the device and then fill the display RAM with little overhead.
MSB
765
CO RS
4 321
not relevant
LSB
0
Fig 16. Control byte format
mgl753
Table 8.
Bit
7
6
5 to 0
Control byte description
Symbol Value
Description
CO
continue bit
0
last control byte
1
control bytes continue
RS
register selection
0
command register
1
data register
-
not relevant
The command bytes and control bytes are also acknowledged by all addressed
PCF8533s connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter; see Section 7.11 and Section 7.12.
PCF8533_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 5 March 2010
© NXP B.V. 2010. All rights reserved.
21 of 45
Share Link: 
