Philips Semiconductors
256 × 8-bit static low-voltage RAM with
I2C-bus interface
Product specification
PCF8570
11 DC CHARACTERISTICS
VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supply
VDD
supply voltage
IDD
supply current
standby mode
VPOR
operating mode
Power-on reset voltage
2.5
−
VI = VDD or VSS;
−
−
fSCL = 0 Hz;
Tamb = −25 to +70 °C
VI = VDD or VSS;
fSCL = 100 Hz
−
−
note 1
1.5
1.9
Inputs, input/output SDA
VIL
LOW level input voltage
VIH
HIGH level input voltage
IOL
LOW level output current
ILI
input leakage current
note 2
note 2
VOL = 0.4 V
VI = VDD or VSS
−0.8
−
0.7VDD −
3
−
−1
−
Inputs A0, A1, A2 and TEST
ILI
input leakage current
VI = VDD or VSS
−250
−
Inputs SCL and SDA
Ci
input capacitance
VI = VSS
−
−
Low VDD data retention
VDDR
supply voltage for data retention
1
−
IDDR
supply current
VDDR = 1 V
−
−
VDDR = 1 V;
−
−
Tamb = −25 to +70 °C
Power-saving mode (see Figs 13 and 14)
IDDR
tHD2
supply current
recovery time
TEST = VDD; Tamb = 25 °C −
50
−
50
6.0
V
5
µA
200
µA
2.3
V
0.3VDD V
VDD + 0.8 V
−
mA
+1
µA
+250
nA
7
pF
6
V
5
µA
2
µA
400
nA
−
µs
Notes
1. The Power-on reset circuit resets the I2C-bus logic when VDD < VPOR. The status of the device after a Power-on reset
condition can be tested by sending the slave address and testing the acknowledge bit.
2. If the input voltages are a diode voltage above or below the supply voltage VDD or VSS an input current will flow; this
current must not exceed ±0.5 mA.
1999 Jan 06
9