PH9025L View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PH9025L' PDF : 12 Pages View PDF
NXP Semiconductors
PH9025L
N-channel TrenchMOS logic level FET
3. Ordering information
Table 2. Ordering information
Type number
Package
Name
PH9025L
LFPAK
Description
plastic single-ended surface-mounted package (lfpak); 4 leads
4. Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VDS
drain-source voltage
25 °C ≤ Tj ≤ 150 °C
-
VDGR drain-gate voltage (DC)
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
VGS
gate-source voltage
-
ID
drain current
Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3
-
Tmb = 100 °C; VGS = 10 V; see Figure 2
-
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3
-
Ptot
total power dissipation
Tmb = 25 °C; see Figure 1
-
Tstg
storage temperature
−55
Tj
junction temperature
−55
Source-drain diode
IS
source current
Tmb = 25 °C
-
ISM
peak source current
Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
unclamped inductive load; ID = 33 A;
-
avalanche energy
tp = 0.16 ms; VDS ≤ 25 V; RGS = 50 Ω;
VGS = 10 V; starting at Tj = 25 °C
Version
SOT669
Max Unit
25
V
25
V
±20
V
66
A
48
A
240
A
62.5 W
+150 °C
+150 °C
52
A
208
A
55
mJ
PH9025L_1
Product data sheet
Rev. 01 — 23 August 2007
© NXP B.V. 2007. All rights reserved.
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