PI49FCT804T
BUFFER/CLOCK DRIVER 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
PI49FCT804T Switching Characteristics over Operating Range
804T
804AT
Com.
Com.
Parameters Description
Conditions(1)
Min Max Min Max Unit
tPLH
Propagation Delay
CL = 50 pF
1.5 6.5 1.5 5.8 ns
tPHL
INA to OAN, INB to OBN
RL = 500Ω
tPZH
Output Enable Time
tPZL
OEA to OAN, OEB to OBN
1.5 8.0 1.5 8.0 ns
tPHZ
Output Disable Time
tPLZ
OEA to OAN, OEB to OBN
1.5 7.0 1.5 7.0 ns
tSKEW(o)(3)
Skew between two outputs
of same package
(same transition)
— 0.8 — 0.7 ns
tSKEW(p)(3)
Skew between opposite
transitions (tPHL-tPLH) of
the same output
— 1.0 — 0.8 ns
tSKEW(t)(3)
Skew between two outputs
of different package at
same temperature
(same transition)
— 1.6 — 1.4 ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
Tests Circuits For All Outputs(1)
VCC
7.0V
Pulse
Generator
VIN
D.U.T.
VOUT
RT
500Ω
50pF
CL
500Ω
Switch Position
Test
Open Drain
Disable LOW
Enable LOW
All Other Inputs
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and
probe capacitance.
RT = Termination resistance: should be
equal to ZOUT of the Pulse Generator.
12
PS7005A 02/04/99